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Computer Science
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Advance Computer Architecture |
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Introduction to FALSIM
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Computer Architecture, Organization and Design
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Foundations of Computer Architecture, RISC and CISC
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Measures of Performance SRC Features and Instruction Formats
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ISA, Instruction Formats, Coding and Hand Assembly
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Reverse Assembly, SRC in the form of RTL
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RTL to Describe the SRC, Register Transfer using Digital Logic Circuits
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Thinking Process for ISA Design
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Introduction to the ISA of the FALCON-A and Examples
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Behavioral Register Transfer Language for FALCON-A, The EAGLE
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The FALCON-E, Instruction Set Architecture Comparison
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CISC microprocessor:The Motorola MC68000, RISC Architecture:The SPARC
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Design Process, Uni-Bus implementation for the SRC, Structural RTL for the SRC instructions
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Structural RTL Description of the SRC and FALCON-A
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External FALCON-A CPU Interface
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Logic Design for the Uni-bus SRC, Control Signals Generation in SRC
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Control Unit, 2-Bus Implementation of the SRC Data Path
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3-bus implementation for the SRC, Machine Exceptions, Reset
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SRC Exception Processing Mechanism, Pipelining, Pipeline Design
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Adapting SRC instructions for Pipelined, Control Signals
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SRC, RTL, Data Dependence Distance, Forwarding, Compiler Solution to Hazards
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Data Forwarding Hardware, Superscalar, VLIW Architecture
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Microprogramming, General Microcoded Controller, Horizontal and Vertical Schemes
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I/O Subsystems, Components, Memory Mapped vs Isolated, Serial and Parallel Transfers
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Designing Parallel Input Output Ports, SAD, NUXI, Address Decoder , Delay Interval
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Designing a Parallel Input Port, Memory Mapped Input Output Ports, wrap around, Data Bus Multiplexing
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Programmed Input Output for FALCON-A and SRC
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Programmed Input Output Driver for SRC, Input Output
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Comparison of Interrupt driven Input Output and Polling
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Preparing source files for FALSIM, FALCON-A assembly language techniques
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Nested Interrupts, Interrupt Mask, DMA
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Direct Memory Access - DMA
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Semiconductor Memory vs Hard Disk, Mechanical Delays and Flash Memory
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Hard Drive Technologies
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Arithmetic Logic Shift Unit - ALSU, Radix Conversion, Fixed Point Numbers
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Overflow, Implementations of the adder, Unsigned and Signed Multiplication
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NxN Crossbar Design for Barrel Rotator, IEEE Floating-Point, Addition, Subtraction, Multiplication, Division
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CPU to Memory Interface, Static RAM, One two Dimensional Memory Cells, Matrix and Tree Decoders
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Memory Modules, Read Only Memory, ROM, Cache
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Cache Organization and Functions, Cache Controller Logic, Cache Strategies
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Virtual Memory Organization
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DRAM, Pipelining, Pre-charging and Parallelism, Hit Rate and Miss Rate, Access Time, Cache
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Performance of I/O Subsystems, Server Utilization, Asynchronous I/O and operating system
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Difference between distributed computing and computer networks
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Physical Media, Shared Medium, Switched Medium, Network Topologies, Seven-layer OSI Model
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