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Advance Computer Architecture

Introduction to FALSIM
Computer Architecture, Organization and Design
Foundations of Computer Architecture, RISC and CISC
Measures of Performance SRC Features and Instruction Formats
ISA, Instruction Formats, Coding and Hand Assembly
Reverse Assembly, SRC in the form of RTL
RTL to Describe the SRC, Register Transfer using Digital Logic Circuits
Thinking Process for ISA Design
Introduction to the ISA of the FALCON-A and Examples
Behavioral Register Transfer Language for FALCON-A, The EAGLE
The FALCON-E, Instruction Set Architecture Comparison
CISC microprocessor:The Motorola MC68000, RISC Architecture:The SPARC
Design Process, Uni-Bus implementation for the SRC, Structural RTL for the SRC instructions
Structural RTL Description of the SRC and FALCON-A
External FALCON-A CPU Interface
Logic Design for the Uni-bus SRC, Control Signals Generation in SRC
Control Unit, 2-Bus Implementation of the SRC Data Path
3-bus implementation for the SRC, Machine Exceptions, Reset
SRC Exception Processing Mechanism, Pipelining, Pipeline Design
Adapting SRC instructions for Pipelined, Control Signals
SRC, RTL, Data Dependence Distance, Forwarding, Compiler Solution to Hazards
Data Forwarding Hardware, Superscalar, VLIW Architecture
Microprogramming, General Microcoded Controller, Horizontal and Vertical Schemes
I/O Subsystems, Components, Memory Mapped vs Isolated, Serial and Parallel Transfers
Designing Parallel Input Output Ports, SAD, NUXI, Address Decoder , Delay Interval
Designing a Parallel Input Port, Memory Mapped Input Output Ports, wrap around, Data Bus Multiplexing
Programmed Input Output for FALCON-A and SRC
Programmed Input Output Driver for SRC, Input Output
Comparison of Interrupt driven Input Output and Polling
Preparing source files for FALSIM, FALCON-A assembly language techniques
Nested Interrupts, Interrupt Mask, DMA
Direct Memory Access - DMA
Semiconductor Memory vs Hard Disk, Mechanical Delays and Flash Memory
Hard Drive Technologies
Arithmetic Logic Shift Unit - ALSU, Radix Conversion, Fixed Point Numbers
Overflow, Implementations of the adder, Unsigned and Signed Multiplication
NxN Crossbar Design for Barrel Rotator, IEEE Floating-Point, Addition, Subtraction, Multiplication, Division
CPU to Memory Interface, Static RAM, One two Dimensional Memory Cells, Matrix and Tree Decoders
Memory Modules, Read Only Memory, ROM, Cache
Cache Organization and Functions, Cache Controller Logic, Cache Strategies
Virtual Memory Organization
DRAM, Pipelining, Pre-charging and Parallelism, Hit Rate and Miss Rate, Access Time, Cache
Performance of I/O Subsystems, Server Utilization, Asynchronous I/O and operating system
Difference between distributed computing and computer networks
Physical Media, Shared Medium, Switched Medium, Network Topologies, Seven-layer OSI Model

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